Released poco-DRAM with controller evaluation board


poco-apoco’s high-speed random access DRAM and its controller embedded on FPGA can be evaluated by this board. A poco-DRAM doubles the performance, which is 24ns random-access with keeping the identical package and the pinout with that of JEDEC standard DRAM.  Hence, users can easily replace DRAM without any expensive hardware modification. The board consists of poco-DRAM, Xilinx -7 series FPGA with DRAM controller and other standard components providing easy evaluations for user.


For more information, please check the following link (poco-DRAM_EvaluationBoard). 


ポコアポコネットワークス社製のpoco-DRAMは、JEDEC標準DRAMとパッケージ、ピン配置の完全互換性を維持しつつ、従来DRAMの性能ボトルネックといわれてきたランダムアクセス速度を2倍高速化しました。ボード実装状態でtRC(ランダムアクセスサイクル時間)=24nsを実現しています。本ボードは、poco-DRAMのほかXilinx社製FPGA Kintex-7を実装し、-7シリーズに組み込む専用のコントローラによって、安価で容易な評価環境をユーザに提供します。




Board Features

        ■ XILINX FPGA XC7K70T-1FBG484C / XC7K160T-1FBG484C

        ■ USB for FPGA configuration

        ■ USB for PC communication that is FT2232H SYNC FIFO mode
        ■ board clock 50MHz(LVTTL)、200MHz (LVDS) in addition to external clock input
        ■ poco-DRAM with DDR3 interface (single chip)
        ■ MRAM implementation by option
        ■ Configuration ROM  Quad SPI ROM : N25Q064 (Micron, 64Mbit)
        ■ DC source 5V 、 1.0V、1.5V、1.8V、3.3V on board
        ■ 7-pin JTAG
        ■ status LED (POWER, DONE)
        ■ standard LED x2
        ■ standard push switch x2